Invention Grant
- Patent Title: Substrate manufacturing method
- Patent Title (中): 基板制造方法
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Application No.: US14346281Application Date: 2011-09-30
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Publication No.: US09380711B2Publication Date: 2016-06-28
- Inventor: Shukichi Takii , Noriaki Taneko , Shigeru Michiwaki , Mitsuho Kurosu , Yuichiro Naya
- Applicant: Shukichi Takii , Noriaki Taneko , Shigeru Michiwaki , Mitsuho Kurosu , Yuichiro Naya
- Applicant Address: JP Ayase-shi, Kanagawa
- Assignee: MEIKO ELECTRONICS CO., LTD.
- Current Assignee: MEIKO ELECTRONICS CO., LTD.
- Current Assignee Address: JP Ayase-shi, Kanagawa
- Agency: Marshall, Gerstein & Borun LLP
- International Application: PCT/JP2011/072588 WO 20110930
- International Announcement: WO2013/046441 WO 20130404
- Main IPC: H01B13/00
- IPC: H01B13/00 ; B23P15/00 ; C03C25/00 ; C23F1/00 ; H05K3/12 ; H01L21/768 ; H05K3/46 ; H05K3/34

Abstract:
A substrate manufacturing method includes an inner layer circuit forming step for partially removing metal films from an insulating base material (2), on both surfaces of which the metal films are stuck, and forming an inner layer circuit (3); and an insulating layer forming step for applying first insulating resin (4) to each of both the surfaces of the insulating base material (2) with an inkjet system and forming an insulating layer (5). In the insulating layer forming step, a via hole (6) from which the inner layer circuit (3) is partially exposed is formed simultaneously with the application of the first insulating resin (4). Consequently, a step of separately forming a via hole with a laser or the like is unnecessary, expenses are relatively low, and it is possible to simplify a manufacturing process.
Public/Granted literature
- US20140224762A1 Substrate Manufacturing Method Public/Granted day:2014-08-14
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