Invention Grant
- Patent Title: Critical capacitor built in test
- Patent Title (中): 临界电容器内置测试
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Application No.: US14366575Application Date: 2012-12-13
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Publication No.: US09383400B2Publication Date: 2016-07-05
- Inventor: Michael Durston , Douglas Robert Sitch
- Applicant: Silicon Sensing Systems Limited
- Applicant Address: GB Plymouth
- Assignee: SILICON SENSING SYSTEMS LIMITED
- Current Assignee: SILICON SENSING SYSTEMS LIMITED
- Current Assignee Address: GB Plymouth
- Priority: GB1122165.2 20111222
- International Application: PCT/GB2012/053127 WO 20121213
- International Announcement: WO2013/093431 WO 20130627
- Main IPC: G01R27/26
- IPC: G01R27/26 ; G01R31/02 ; G01R19/165
Abstract:
An electronic circuit and method for carrying out built in test of a capacitor connected to, and arranged to suppress noise at, an input of an electrical circuit is disclosed. The electronic circuit causes current pulses at the input, and monitors the voltage at the input by comparing the voltage at the input with high and/or low reference voltages, outputting a fault signal if the voltage at the input is greater than a high reference voltage or lower than a low reference voltage.
Public/Granted literature
- US20140320155A1 CRITICAL CAPACITOR BUILT IN TEST Public/Granted day:2014-10-30
Information query
