Invention Grant
- Patent Title: Selecting a voltage sense line that maximizes memory margin
- Patent Title (中): 选择最大化存储容限的电压检测线
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Application No.: US14476087Application Date: 2014-09-03
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Publication No.: US09384787B2Publication Date: 2016-07-05
- Inventor: Michael DeCesaris , Luke D. Remis , Brian C. Totten
- Applicant: Lenovo Enterprise Solutions (Singapore) Pte. Ltd.
- Applicant Address: SG Singapore
- Assignee: Lenovo Enterprise Solutions (Singapore) Pte. Ltd.
- Current Assignee: Lenovo Enterprise Solutions (Singapore) Pte. Ltd.
- Current Assignee Address: SG Singapore
- Agent Katherine S. Brown; Jeffrey L. Streets
- Main IPC: G11C5/14
- IPC: G11C5/14 ; G06F1/26 ; G11C5/04

Abstract:
A computer program product includes a computer readable storage medium embodying program instructions executable by a processor to perform a method. The method includes sequentially passing a voltage signal from each voltage sense line pair to a voltage feedback line of a voltage regulator. The voltage regulator controls voltage to the memory system responsive to the voltage signal received at the voltage feedback line, wherein the memory system includes a plurality of voltage sense line pairs in different locations. For each voltage sense line pair, the method identifies a memory margin based on memory operation while regulating voltage responsive to the voltage signal from the voltage sense line pair. The voltage sense line pair that provides the greatest memory margin is identified, and the voltage regulator is made to control voltage to the memory system responsive to the identified voltage sense line pair.
Public/Granted literature
- US20160064042A1 SELECTING A VOLTAGE SENSE LINE THAT MAXIMIZES MEMORY MARGIN Public/Granted day:2016-03-03
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