Invention Grant
- Patent Title: Multilayered semiconductor device
- Patent Title (中): 多层半导体器件
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Application No.: US14995067Application Date: 2016-01-13
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Publication No.: US09384788B2Publication Date: 2016-07-05
- Inventor: Tetsuo Fukushi , Atsunori Hirobe , Muneaki Matsushige
- Applicant: Renesas Electronics Corporation
- Applicant Address: JP Kawasaki-shi, Kanagawa
- Assignee: Renesas Electronics Corporation
- Current Assignee: Renesas Electronics Corporation
- Current Assignee Address: JP Kawasaki-shi, Kanagawa
- Agency: McGinn IP Law Group, PLLC
- Priority: JP2014-078676 20140407
- Main IPC: G11C5/14
- IPC: G11C5/14 ; H01L23/50 ; H01L23/48 ; H01L23/00 ; H01L25/065 ; G11C5/02

Abstract:
A semiconductor device includes a first semiconductor chip located over a substrate; and a second semiconductor chip located over the first semiconductor chip, wherein the first semiconductor chip includes a first internal power supply generation circuit that generates a first internal power supply voltage supplied to a first internal circuit; a first penetration electrode formed from an upper surface of the first semiconductor chip to an underside of the first semiconductor chip and electrically connected to the first internal power supply generation circuit; a first reference voltage generation circuit that generates a first reference voltage; and a second penetration electrode formed from the upper surface of the first semiconductor chip to the underside of the first semiconductor chip and electrically connected to the first reference voltage generation circuit.
Public/Granted literature
- US20160133301A1 MULTILAYERED SEMICONDUCTOR DEVICE Public/Granted day:2016-05-12
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