Invention Grant
US09385098B2 Variable-size solder bump structures for integrated circuit packaging 有权
用于集成电路封装的可变尺寸焊料凸块结构

Variable-size solder bump structures for integrated circuit packaging
Abstract:
An integrated circuit package is described including a substrate, an integrated circuit die, a first plurality of solder bump structures, and a first plurality of variable-size solder bump structures. The first plurality of solder bump structures electrically couple the integrated circuit die to the substrate. The first plurality of variable-size solder bump structures are disposed on a bottom surface of the substrate. The first plurality of variable-size solder bump structures are sized to be substantially coplanar with a seating plane of the integrated circuit package.
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