Invention Grant
US09385098B2 Variable-size solder bump structures for integrated circuit packaging
有权
用于集成电路封装的可变尺寸焊料凸块结构
- Patent Title: Variable-size solder bump structures for integrated circuit packaging
- Patent Title (中): 用于集成电路封装的可变尺寸焊料凸块结构
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Application No.: US13683315Application Date: 2012-11-21
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Publication No.: US09385098B2Publication Date: 2016-07-05
- Inventor: Leilei Zhang , Zuhair Bokharey
- Applicant: NVIDIA CORPORATION
- Applicant Address: US CA Santa Clara
- Assignee: NVIDIA Corporation
- Current Assignee: NVIDIA Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Artegis Law Group, LLP
- Main IPC: H01L23/00
- IPC: H01L23/00 ; H01L21/66 ; H01L23/498 ; H05K3/34 ; H01L21/56

Abstract:
An integrated circuit package is described including a substrate, an integrated circuit die, a first plurality of solder bump structures, and a first plurality of variable-size solder bump structures. The first plurality of solder bump structures electrically couple the integrated circuit die to the substrate. The first plurality of variable-size solder bump structures are disposed on a bottom surface of the substrate. The first plurality of variable-size solder bump structures are sized to be substantially coplanar with a seating plane of the integrated circuit package.
Public/Granted literature
- US20140138823A1 VARIABLE-SIZE SOLDER BUMP STRUCTURES FOR INTEGRATED CIRCUIT PACKAGING Public/Granted day:2014-05-22
Information query
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