Invention Grant
US09385125B2 Semiconductor integrated circuit device 有权
半导体集成电路器件

Semiconductor integrated circuit device
Abstract:
An MV-PMOS and MV-NMOS configuring a high side drive circuit are formed in an n-type isolation region formed on a p-type semiconductor substrate. The MV-NMOS is connected to a p-type isolation region of an intermediate potential in the interior of the n-type isolation region. An n-type epitaxial region is provided in a surface layer of the p-type semiconductor substrate on the outer side of the n-type isolation region, and a p-type GND region of a ground potential (GND) is provided on the outer side of the n-type epitaxial region. A cavity is provided between the p-type semiconductor substrate and n-type epitaxial region between the high side drive circuit and p-type GND region, and a p-type diffusion region is provided penetrating the n-type epitaxial region and reaching the cavity. The intermediate potential is applied to the p-type isolation region.
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