Invention Grant
- Patent Title: FinFETs with strained well regions
- Patent Title (中): 具有紧张井区的FinFET
-
Application No.: US14506189Application Date: 2014-10-03
-
Publication No.: US09385234B2Publication Date: 2016-07-05
- Inventor: Yi-Jing Lee , Chi-Wen Liu
- Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Slater Matsil, LLP
- Main IPC: H01L29/78
- IPC: H01L29/78 ; H01L29/66 ; H01L21/8234 ; H01L29/778 ; H01L27/088 ; H01L29/06 ; H01L29/165 ; H01L29/43
Abstract:
A device includes a substrate, insulation regions extending into the substrate, a first semiconductor region between the insulation regions and having a first valence band, and a second semiconductor region over and adjoining the first semiconductor region. The second semiconductor region has a compressive strain and a second valence band higher than the first valence band. The second semiconductor region includes an upper portion higher than top surfaces of the insulation regions to form a semiconductor fin, and a lower portion lower than the top surfaces of the insulation regions. The upper portion and the lower portion are intrinsic. A semiconductor cap adjoins a top surface and sidewalls of the semiconductor fin. The semiconductor cap has a third valence band lower than the second valence band.
Public/Granted literature
- US20150054040A1 FINFETS WITH STRAINED WELL REGIONS Public/Granted day:2015-02-26
Information query
IPC分类:
