Invention Grant
- Patent Title: Adaptive correction of interleaving errors in time-interleaved analog-to-digital converters
- Patent Title (中): 时间交错模数转换器中交错误差的自适应校正
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Application No.: US14681604Application Date: 2015-04-08
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Publication No.: US09385737B1Publication Date: 2016-07-05
- Inventor: Qian Yu , Shayan Farahvash
- Applicant: Maxim Integrated Products, Inc.
- Applicant Address: US CA San Jose
- Assignee: Maxin Integrated Products, Inc.
- Current Assignee: Maxin Integrated Products, Inc.
- Current Assignee Address: US CA San Jose
- Main IPC: H03M1/12
- IPC: H03M1/12 ; H03M1/06 ; H03M1/38 ; H03M1/10
Abstract:
A system includes an interleaved analog-to-digital converter (ADC) comprising a plurality of sub-ADCs, where each of the plurality of sub-ADCs has an adjustable timing. The system includes a data analyzer that analyzes an output of the interleaved ADC, that estimates timing mismatches of the plurality of sub-ADCs, and that corrects the timing mismatches by adjusting the adjustable timing of one or more of the plurality of sub-ADCs based on the estimated timing mismatches.
Information query
