Modular, low power serializer-deserializer receivers and methods for configuring such receivers are disclosed. The disclosed receivers are configured to sample input signals at the front-end utilizing a plurality of track-and-hold circuits time-interleaved based on a plurality of phase-shifted clock signals. The disclosed receivers are also modular and various processing components, including analog front-end and equalizers, are selectively utilized based on the determined length of the communication channel, ranging from ultra short reach applications to very short reach, medium reach, long reach and extra long reach applications.