Invention Grant
- Patent Title: Video decoding error concealment techniques
- Patent Title (中): 视频解码错误隐藏技术
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Application No.: US13646127Application Date: 2012-10-05
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Publication No.: US09386326B2Publication Date: 2016-07-05
- Inventor: Krishna Kishor Noru , Nitin Jadon , Shu-Jen Fang , Prahlad Venkatapuram , Visalakshi Vaduganathan
- Applicant: Nvidia Corporation
- Applicant Address: US CA Santa Clara
- Assignee: NVIDIA CORPORATION
- Current Assignee: NVIDIA CORPORATION
- Current Assignee Address: US CA Santa Clara
- Main IPC: H04N7/68
- IPC: H04N7/68 ; H04N19/895 ; H04N19/139 ; H04N19/176 ; H04N19/102 ; H04N19/16

Abstract:
Techniques for synchronizing error concealment during video decoding include determining a decoding error. A recovery point within a current frame is determined for each decoding error. The determined recovery point may be the start of the next good slice of a frame after the current frame containing the error. The number of macroblock to be concealed is also determined. The determined number of macroblocks from the recovery point may then be concealed in hardware or software. The techniques for concealing errors may also include determining available macroblocks for use in concealing the error. The techniques for concealing errors may further include selecting a given concealment mode.
Public/Granted literature
- US20140098898A1 VIDEO DECODING ERROR CONCEALMENT TECHNIQUES Public/Granted day:2014-04-10
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