Invention Grant
- Patent Title: Integrated circuit having voltage mismatch reduction
- Patent Title (中): 具有电压失配减小的集成电路
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Application No.: US14980250Application Date: 2015-12-28
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Publication No.: US09390816B2Publication Date: 2016-07-12
- Inventor: Yu-Hao Hsu , Chia-En Huang , Hektor Huang , Yi-Ching Chang , Chen-Lin Yang , Jung-Ping Yang , Cheng Hung Lee
- Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Applicant Address: TW
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Current Assignee Address: TW
- Agency: Hauptman Ham, LLP
- Main IPC: G11C11/00
- IPC: G11C11/00 ; G11C29/00 ; G11C11/419 ; G11C11/417

Abstract:
An integrated circuit has a first circuit portion on a first level and a second circuit portion on a second level different from the first level. The first circuit portion includes a first cell having a first voltage value at a first node and a second voltage value at a second node. The second circuit portion includes a second cell coupled with the first cell, the second cell being selectively controllable to supply a voltage to the first cell based on an instruction to supply the voltage. The instruction to supply the voltage is based on a determined mismatch between the first voltage value and the second voltage value being greater than a predetermined threshold value.
Public/Granted literature
- US20160133342A1 INTEGRATED CIRCUIT HAVING VOLTAGE MISMATCH REDUCTION Public/Granted day:2016-05-12
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