Invention Grant
- Patent Title: Semiconductor dielectric interface and gate stack
- Patent Title (中): 半导体介质接口和栅极叠层
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Application No.: US13774852Application Date: 2013-02-22
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Publication No.: US09390913B2Publication Date: 2016-07-12
- Inventor: Chien-Hsun Wang , Shih Wei Wang , Ravi Droopad , Gerben Doombos , Georgios Vellianitis , Matthias Passlack
- Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Haynes and Boone, LLP
- Main IPC: H01L21/02
- IPC: H01L21/02 ; H01L29/51 ; H01L21/306 ; H01L21/28

Abstract:
A semiconductor/dielectric interface having reduced interface trap density and a method of manufacturing the interface are disclosed. In an exemplary embodiment, the method comprises receiving a substrate, the substrate containing a semiconductor; preparing a surface of the substrate; forming a termination layer bonded to the semiconductor at the surface of the substrate; and depositing a dielectric layer above the termination layer, the depositing configured to not disrupt the termination layer. The forming of the termination layer may be configured to produce the termination layer having a single layer of oxygen atoms between the substrate and the dielectric layer.
Public/Granted literature
- US20140239418A1 Semiconductor Dielectric Interface and Gate Stack Public/Granted day:2014-08-28
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