Invention Grant
- Patent Title: Electrical connectivity for circuit applications
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Application No.: US14182559Application Date: 2014-02-18
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Publication No.: US09390944B2Publication Date: 2016-07-12
- Inventor: Donald J. Desbiens , Gary D. Polhemus , Robert T. Carroll
- Applicant: Donald J. Desbiens , Gary D. Polhemus , Robert T. Carroll
- Applicant Address: US CA El Segundo
- Assignee: Infineon Technologies Americas Corp.
- Current Assignee: Infineon Technologies Americas Corp.
- Current Assignee Address: US CA El Segundo
- Agency: Chapin IP Law, LLC
- Main IPC: H01L23/48
- IPC: H01L23/48 ; H01L21/50 ; H01L23/495 ; H01L23/482 ; H01L23/532 ; H01L23/00 ; H01L27/088

Abstract:
According to example configurations herein, a leadframe includes a first conductive strip, a second conductive strip, and a third conductive strip disposed substantially adjacent and substantially parallel to each other. A semiconductor chip substrate includes a first array of switch circuits disposed adjacent and parallel to a second array of switch circuits. Source nodes in switch circuits of the first array are disposed substantially adjacent and substantially parallel to source nodes in switch circuits of the second array. When the semiconductor chip and the leadframe device are combined to form a circuit package, a connectivity interface between the semiconductor chip and conductive strips in the circuit package couples each of the source nodes in switch circuits of the first array and each of the multiple source nodes in switch circuits of the second array to a common conductive strip in the leadframe device.
Public/Granted literature
- US20140162410A1 ELECTRICAL CONNECTIVITY FOR CIRCUIT APPLICATIONS Public/Granted day:2014-06-12
Information query
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