Sampling is continuously performed at high speed with a simple sampling circuit including a polarity switcher to invert or non-invert the polarity of an input signal; an integrating circuit to integrate the signal output from the polarity switcher to output integrated values corresponding to the amount of charge stored in a capacitor; a computing section configured to compute a sampling value every sampling period in such a manner that a difference between one of the integrated values output from the integrating circuit at the start of the sampling period and another one of the integrated values output from the integrating circuit at the end of the sampling period is multiplied by a sign corresponding to the polarity set by the polarity switcher; and a control section configured to control the polarity switcher to alternately invert the polarity of the input signal every sampling period in synchronization with a sampling cycle.