Invention Grant
US09401311B2 Self aligned structure and method for high-K metal gate work function tuning 有权
用于高K金属栅极功能调谐的自对准结构和方法

Self aligned structure and method for high-K metal gate work function tuning
Abstract:
A semiconductor device and a method for fabricating the device. The method includes: forming a STI in a substrate having a nFET and a pFET region; depositing a high-k layer and a TiN layer; depositing a polycrystalline silicon layer; forming a block level litho layer; removing a portion of the polycrystalline silicon layer; removing the block level litho layer; forming a first protective layer; depositing a fill layer above the pFET region; removing the first protective layer; cutting the TiN layer and the high-k layer to expose a portion of the STI; depositing a second protective layer on the STI; removing the fill layer; removing the TiN layer above the pFET region; treating the high-k layer with a work function tuning process; removing the polycrystalline silicon layer and TiN layer; and depositing a metal layer on the high-k layer and the second protective layer.
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