Invention Grant
US09401416B2 Method for reducing gate height variation due to overlapping masks
有权
减少由于重叠掩模引起的门高度变化的方法
- Patent Title: Method for reducing gate height variation due to overlapping masks
- Patent Title (中): 减少由于重叠掩模引起的门高度变化的方法
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Application No.: US14560035Application Date: 2014-12-04
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Publication No.: US09401416B2Publication Date: 2016-07-26
- Inventor: Hong Yu , Jin Ping Liu , Haigou Huang , Huang Liu
- Applicant: GLOBALFOUNDRIES Inc.
- Applicant Address: KY Grand Cayman
- Assignee: GLOBALFOUNDRIES Inc.
- Current Assignee: GLOBALFOUNDRIES Inc.
- Current Assignee Address: KY Grand Cayman
- Agency: Amerson Law Firm, PLLC
- Main IPC: H01L21/768
- IPC: H01L21/768 ; H01L29/66 ; H01L21/02 ; H01L21/3105

Abstract:
A method includes forming at least one fin in a semiconductor substrate. A placeholder gate structure is formed above the fin. The placeholder gate structure includes a placeholder material and a cap structure defined on a top surface of the placeholder material. The cap structure includes a first cap layer disposed above the placeholder material and a second cap layer disposed above the first cap layer. An oxidization process is performed on at least a portion of the second cap layer to form an oxidized region above a remaining portion of the second cap layer. A portion of the oxidized region is removed to expose the remaining portion. The remaining portion of the second cap layer is removed. The first cap layer is removed to expose the placeholder material. The placeholder material is replaced with a conductive material.
Public/Granted literature
- US20160163830A1 METHOD FOR REDUCING GATE HEIGHT VARIATION DUE TO OVERLAPPING MASKS Public/Granted day:2016-06-09
Information query
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