Invention Grant
- Patent Title: Programmable logic device
- Patent Title (中): 可编程逻辑器件
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Application No.: US14052193Application Date: 2013-10-11
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Publication No.: US09401714B2Publication Date: 2016-07-26
- Inventor: Shunpei Yamazaki , Yoshiyuki Kurokawa
- Applicant: Semiconductor Energy Laboratory Co., Ltd.
- Applicant Address: JP Kanagawa-ken
- Assignee: Semiconductor Energy Laboratory Co., Ltd.
- Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
- Current Assignee Address: JP Kanagawa-ken
- Agency: Fish & Richardson P.C.
- Priority: JP2012-229646 20121017
- Main IPC: H03K19/177
- IPC: H03K19/177 ; H03K19/00

Abstract:
To obtain a PLD that achieves high-speed configuration capable of dynamic configuration, consumes less power, and has a short startup time and a PLD that has a smaller number of transistors or a smaller circuit area than a PLD using an SRAM as a configuration memory, a plurality of logic elements arranged in an array and a switch for selecting electrical connection between the logic elements are provided. The switch includes a first transistor including a multilayer film including an oxide layer and an oxide semiconductor layer, a node that becomes floating when the first transistor is turned off, and a second transistor in which electrical continuity between a source and a drain is determined based on configuration data held at the node.
Public/Granted literature
- US20140103960A1 PROGRAMMABLE LOGIC DEVICE Public/Granted day:2014-04-17
Information query
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