Invention Grant
- Patent Title: Prioritizing instructions based on the number of delay cycles
- Patent Title (中): 基于延迟周期数的优先级指令
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Application No.: US13314052Application Date: 2011-12-07
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Publication No.: US09405548B2Publication Date: 2016-08-02
- Inventor: Venkat R Indukuru , Alexander E Mericas
- Applicant: Venkat R Indukuru , Alexander E Mericas
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: Yudell Isidore PLLC
- Agent Eustace P. Isidore
- Main IPC: G06F9/38
- IPC: G06F9/38

Abstract:
Methods, systems, and computer program products may provide delay-identification in data processing systems. An apparatus may include a delay-identification unit having a delay counter, a threshold register, a delay register, and a delay detector. The delay detector may be configured to start the delay counter in response to detecting that one group of instructions is delayed, and stop the delay counter in response to detecting that the one group of instructions is no longer delayed. The delay detector may additionally be configured to compare the number of cycles counted by the delay counter with a threshold number of cycles in the threshold register, and store at least one effective address of one of the instructions of the one group of instructions when the number of cycles counted by the delay counter is greater than the threshold number of cycles stored in the threshold register.
Public/Granted literature
- US20130151816A1 DELAY IDENTIFICATION IN DATA PROCESSING SYSTEMS Public/Granted day:2013-06-13
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