A semiconductor device may include a first pad suitable for inputting a dock, a plurality of second pads suitable for inputting data through a plurality of first data paths, a third pad suitable for inputting a first strobe signal through a first strobe signal path, a data latch unit suitable for latching the data inputted through the first data paths in response to the first strobe signal inputted through the first strobe signal path, and a calibration control unit suitable for calibrating delay values of the plurality of first data paths and the first strobe signal path in a first calibration mode such that a plurality of first test signals passing through the respective first data paths and a second test signal passing through the first strobe path are in phase with the clock inputted from the first pad.