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US09406388B2 Memory area protection system and methods 有权
记忆体保护系统和方法

Memory area protection system and methods
Abstract:
In one embodiment, a non-volatile memory device includes a plurality of protection bits denoting that an area of memory in the device must be protected from being erased or programmed. The memory device further includes a majority logic circuit for determining the logic state of the majority of the plurality of protection bits. Another embodiment includes a pattern generator for generating the logic levels to be stored in the plurality of protection bits.
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