Invention Grant
- Patent Title: Interposer having molded low CTE dielectric
- Patent Title (中): 具有低CTE电介质的内插器
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Application No.: US14221486Application Date: 2014-03-21
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Publication No.: US09406532B2Publication Date: 2016-08-02
- Inventor: Belgacem Haba , Ilyas Mohammed
- Applicant: Tessera, Inc.
- Applicant Address: US CA San Jose
- Assignee: Tessera, Inc.
- Current Assignee: Tessera, Inc.
- Current Assignee Address: US CA San Jose
- Agency: Lerner, David, Littenberg, Krumholz & Mentlik, LLP
- Main IPC: H01L21/44
- IPC: H01L21/44 ; H01L21/48 ; H01L23/498 ; H05K3/40

Abstract:
A method for making an interconnection component is disclosed, including forming a plurality of metal posts extending away from a reference surface. Each post is formed having a pair of opposed end surface and an edge surface extending therebetween. A dielectric layer is formed contacting the edge surfaces and filling spaces between adjacent ones of the posts. The dielectric layer has first and second opposed surfaces adjacent the first and second end surfaces. The dielectric layer has a coefficient of thermal expansion of less than 8 ppm/° C. The interconnection component is completed such that it has no interconnects between the first and second end surfaces of the posts that extend in a lateral direction. First and second pluralities of wettable contacts are adjacent the first and second opposed surfaces. The wettable contacts are usable to bond the interconnection component to a microelectronic element or a circuit panel.
Public/Granted literature
- US20140206184A1 INTERPOSER HAVING MOLDED LOW CTE DIELECTRIC Public/Granted day:2014-07-24
Information query
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