Invention Grant
- Patent Title: Methods for fabricating integrated circuits with semiconductor substrate protection
- Patent Title (中): 制造具有半导体衬底保护的集成电路的方法
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Application No.: US13842077Application Date: 2013-03-15
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Publication No.: US09406565B2Publication Date: 2016-08-02
- Inventor: Peter Javorka , Ralf Richter , Jan Hoentschel
- Applicant: GLOBALFOUNDRIES, Inc.
- Applicant Address: KY Grand Cayman
- Assignee: GLOBALFOUNDRIES, INC.
- Current Assignee: GLOBALFOUNDRIES, INC.
- Current Assignee Address: KY Grand Cayman
- Agency: Ingrassia Fisher & Lorenz, P.C.
- Main IPC: H01L21/8234
- IPC: H01L21/8234 ; H01L21/266 ; H01L21/8238 ; H01L21/265 ; H01L29/66

Abstract:
Methods for fabricating an integrated circuit are provided herein. In an embodiment, a method for fabricating an integrated circuit includes forming a gate electrode structure overlying a semiconductor substrate. A first sacrificial oxide layer is formed overlying the semiconductor substrate and a first implant mask is patterned overlying the first sacrificial oxide layer to expose a portion of the first sacrificial oxide layer adjacent the gate electrode structure. Conductivity determining ions are implanted into the semiconductor substrate, through the first sacrificial oxide layer. The first implant mask and the first sacrificial oxide layer are removed after implanting the conductivity determining ions into the semiconductor substrate.
Public/Granted literature
- US20140273375A1 METHODS FOR FABRICATING INTEGRATED CIRCUITS WITH SEMICONDUCTOR SUBSTRATE PROTECTION Public/Granted day:2014-09-18
Information query
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