Invention Grant
- Patent Title: Semiconductor package and method for manufacturing the same
- Patent Title (中): 半导体封装及其制造方法
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Application No.: US14461840Application Date: 2014-08-18
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Publication No.: US09406584B2Publication Date: 2016-08-02
- Inventor: Jeong Hwan Lee , Tac Keun Oh
- Applicant: SK hynix Inc.
- Applicant Address: KR Icheon-si, Gyeonggi-do
- Assignee: SK hynix Inc.
- Current Assignee: SK hynix Inc.
- Current Assignee Address: KR Icheon-si, Gyeonggi-do
- Agency: William Park & Associates Ltd.
- Priority: KR10-2014-0049556 20140424
- Main IPC: H01L23/02
- IPC: H01L23/02 ; H01L23/373 ; H01L23/31 ; H01L23/00 ; H01L25/18 ; H01L23/24

Abstract:
A semiconductor package may include an interposer; a first semiconductor chip disposed on a first surface of the interposer and at least one second semiconductor chip disposed at a predefined distance from the first semiconductor chip, a molding part filling spaces between the first semiconductor chip and the at least one second semiconductor chip and having a trench hole formed therein, and a thermal expansion buffer pattern filling the trench hole.
Public/Granted literature
- US20150311182A1 SEMICONDUCTOR PACKAGE AND METHOD FOR MANUFACTURING THE SAME Public/Granted day:2015-10-29
Information query
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