Invention Grant
- Patent Title: Via corner engineering in trench-first dual damascene process
- Patent Title (中): 通过沟槽第一个双镶嵌工艺的拐角工程
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Application No.: US14213329Application Date: 2014-03-14
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Publication No.: US09406589B2Publication Date: 2016-08-02
- Inventor: Chih-Yuan Ting
- Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Slater Matsil, LLP
- Main IPC: H01L21/4763
- IPC: H01L21/4763 ; H01L23/48 ; H01L21/768
Abstract:
An integrated circuit structure includes a first dielectric layer, an etch stop layer over the first dielectric layer, and a second dielectric layer over the etch stop layer. A via is disposed in the first dielectric layer and the etch stop layer. A metal line is disposed in the second dielectric layer, wherein the metal line is connected to the via. The etch stop layer includes a first portion having an edge contacting an edge of the via, wherein the first portion has a first chemical composition, and a second portion in contact with the first portion. The second portion is spaced apart from the via by the first portion, and wherein the second portion has a second chemical composition different from the first composition.
Public/Granted literature
- US20150262912A1 Via Corner Engineering in Trench-First Dual Damascene Process Public/Granted day:2015-09-17
Information query
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