Invention Grant
- Patent Title: Chip package and manufacturing method thereof
- Patent Title (中): 芯片封装及其制造方法
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Application No.: US14255883Application Date: 2014-04-17
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Publication No.: US09406590B2Publication Date: 2016-08-02
- Inventor: Chia-Sheng Lin , Yen-Shih Ho , Tsang-Yu Liu
- Applicant: XINTEC INC.
- Applicant Address: TW Taoyuan
- Assignee: XINTEC INC.
- Current Assignee: XINTEC INC.
- Current Assignee Address: TW Taoyuan
- Agency: Liu & Liu
- Main IPC: H01L23/48
- IPC: H01L23/48 ; H01L23/495 ; H01L23/00

Abstract:
A chip package is provided. The chip package comprises a semiconductor chip, an isolation layer, a redistributing metal layer, and a bonding pad. The semiconductor chip has a first conducting pad disposed on a lower surface, and a first hole corresponding to the first conducting pad. The first hole and the isolation layer extend from an upper surface to the lower surface to expose the first conducting pad. The redistributing metal layer is disposed on the isolation layer and has a redistributing metal line corresponding to the first conducting pad, the redistributing metal line is connected to the first conducting pad through the opening. The bonding pad is disposed on the isolation layer and one side of the semiconductor chip, wherein the redistributing metal line extends to the bonding pad to electrically connect the first conducting pad to the bonding pad. A method thereof is also provided.
Public/Granted literature
- US20140312478A1 CHIP PACKAGE AND MANUFACTURING METHOD THEREOF Public/Granted day:2014-10-23
Information query
IPC分类: