Invention Grant
US09406632B2 Semiconductor package including a substrate with a stepped sidewall structure
有权
半导体封装，包括具有阶梯式侧壁结构的衬底
- Patent Title: Semiconductor package including a substrate with a stepped sidewall structure
- Patent Title (中): 半导体封装，包括具有阶梯式侧壁结构的衬底
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Application No.: US14452219Application Date: 2014-08-05
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Publication No.: US09406632B2Publication Date: 2016-08-02
- Inventor: Tsung-Ding Wang , Jung Wei Cheng , Bo-I Lee
- Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Applicant Address: TW
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Current Assignee Address: TW
- Agency: Hauptman Ham, LLP
- Main IPC: H01L23/48
- IPC: H01L23/48 ; H01L23/52 ; H01L29/40 ; H01L23/00 ; H01L21/00 ; H01L23/31 ; H01L21/56
Abstract:
A semiconductor package includes a passivation layer overlying a semiconductor substrate, a pillar bump overlying the passivation layer, and a molding compound layer overlying the passivation layer and covering a lower portion of the bump. A sidewall of the passivation layer is covered by the molding compound layer.
Public/Granted literature
- US20140346669A1 SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAME Public/Granted day:2014-11-27
Information query
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