Invention Grant
US09406672B2 Capacitor arrays for minimizing gradient effects and methods of forming the same
有权
用于最小化梯度效应的电容器阵列及其形成方法
- Patent Title: Capacitor arrays for minimizing gradient effects and methods of forming the same
- Patent Title (中): 用于最小化梯度效应的电容器阵列及其形成方法
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Application No.: US14302476Application Date: 2014-06-12
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Publication No.: US09406672B2Publication Date: 2016-08-02
- Inventor: Chi-Feng Huang , Chia-Chung Chen
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Duane Morris LLP
- Main IPC: H01L27/08
- IPC: H01L27/08 ; H01L27/01 ; H01L27/02 ; H01L49/02 ; H01L23/522

Abstract:
Methods of forming semiconductor devices. The method includes forming a capacitor array comprising a plurality of cells in a two-dimensional grid. The step of forming includes forming a plurality of operational capacitors in a first subset of the plurality of cells along a diagonal of the array, the plurality of operational capacitors comprising a first operational capacitor formed in a cell at a first edge of the capacitor array and at a first edge of the diagonal of the capacitor array. The step of forming also includes forming a plurality of dummy patterns about the plurality of operational capacitors in the capacitor array in a second subset of the plurality of cells to achieve symmetry in the grid about the diagonal. The method also includes electrically coupling each one of the plurality of operational capacitors to another one of the plurality of operational capacitors.
Public/Granted literature
- US20140295640A1 CAPACITOR ARRAYS FOR MINIMIZING GRADIENT EFFECTS AND METHODS OF FORMING THE SAME Public/Granted day:2014-10-02
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