Invention Grant
- Patent Title: Method of manufacturing super junction for semiconductor device
- Patent Title (中): 制造半导体器件超导结的方法
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Application No.: US14807242Application Date: 2015-07-23
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Publication No.: US09406745B2Publication Date: 2016-08-02
- Inventor: Paul Chung-Chen Chang , Kuo-Liang Chao , Mei-Ling Chen , Lung-Ching Kao
- Applicant: PFC Device Holdings Limited
- Applicant Address: HK Chai Wan
- Assignee: PFC DEVICE HOLDINGS LIMITED
- Current Assignee: PFC DEVICE HOLDINGS LIMITED
- Current Assignee Address: HK Chai Wan
- Agency: Muncy, Geissler, Olds & Lowe, P.C.
- Priority: TW101147146A 20121213
- Main IPC: H01L21/20
- IPC: H01L21/20 ; H01L29/06 ; H01L21/266 ; H01L21/265 ; H01L21/324 ; H01L29/08 ; H01L29/66 ; H01L29/739 ; H01L29/74 ; H01L29/861 ; H01L29/872 ; H01L29/78 ; H01L29/749
Abstract:
A method of manufacturing super junction for semiconductor device is disclosed. The super junction for semiconductor device includes a silicon substrate with a first conductive type epitaxial layer, a plurality of highly-doped second conductive type columns formed in the first conductive type epitaxial layer, and a plurality of lightly-doped (first conductive type or second conductive type) side walls formed on outer surfaces of the highly-doped second conductive type. The semiconductor device is super-junction MOSFET, super junction MOSFET, super junction Schottky rectifier, super junction IGBT, thyristor or super junction diode.
Public/Granted literature
- US20150325643A1 METHOD OF MANUFACTURING SUPER JUNCTION FOR SEMICONDUCTOR DEVICE Public/Granted day:2015-11-12
Information query
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