Invention Grant
US09406812B1 Asymmetric dense floating gate nonvolatile memory with decoupled capacitor 有权
非对称密集浮动非易失性存储器,具有去耦电容

Asymmetric dense floating gate nonvolatile memory with decoupled capacitor
Abstract:
A nonvolatile memory (“NVM”) bitcell includes a source and a drain formed in an active region of a substrate and separated by a channel region in the active region. A gate stack formed over the substrate includes a gate formed on an oxide and at least one sidewall spacer formed around the gate. A charge trapping layer is formed on an opposite side of the sidewall spacer from the gate, where at least a portion of the charge trapping layer acts as a floating gate for the bitcell. The bitcell further includes a salicide block covering the floating gate portion of the charge trapping layer. An contact (sometimes referred to as a bar contact) physically contacts the salicide block above the floating gate portion of the charge trapping layer.
Information query
IPC分类:
H 电学
H01 基本电气元件
H01L 半导体器件;其他类目中不包括的电固体器件(使用半导体器件的测量入G01;一般电阻器入H01C;磁体、电感器、变压器入H01F;一般电容器入H01G;电解型器件入H01G9/00;电池组、蓄电池入H01M;波导管、谐振器或波导型线路入H01P;线路连接器、汇流器入H01R;受激发射器件入H01S;机电谐振器入H03H;扬声器、送话器、留声机拾音器或类似的声机电传感器入H04R;一般电光源入H05B;印刷电路、混合电路、电设备的外壳或结构零部件、电气元件的组件的制造入H05K;在具有特殊应用的电路中使用的半导体器件见应用相关的小类)
H01L29/00 专门适用于整流、放大、振荡或切换,并具有至少一个电位跃变势垒或表面势垒的半导体器件;具有至少一个电位跃变势垒或表面势垒,例如PN结耗尽层或载流子集结层的电容器或电阻器;半导体本体或其电极的零部件(H01L31/00至H01L47/00,H01L51/05优先;除半导体或其电极之外的零部件入H01L23/00;由在一个共用衬底内或其上形成的多个固态组件组成的器件入H01L27/00)
H01L29/66 .按半导体器件的类型区分的
H01L29/68 ..只能通过对一个不通有待整流、放大或切换的电流的电极供给电流或施加电位方可进行控制的(H01L29/96优先)
H01L29/76 ...单极器件
H01L29/772 ....场效应晶体管
H01L29/78 .....由绝缘栅产生场效应的
H01L29/792 ......带有电荷捕获栅绝缘体,例如MNOS存储晶体管
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