One or more circuits are provided wherein leakage current is mitigated. A circuit comprises a pad, a first transistor, a second transistor, a power leakage component and a data leakage component. The first transistor and the second transistor are respectively configured to control a voltage level at the pad. The first transistor is connected to the pad and to a first voltage source. The second transistor is connected to the pad and to a third voltage source. The power leakage component is connected between the first transistor and the pad. The data leakage component is connected between the second transistor and the pad. The power leakage component is configured to mitigate leakage current from the first transistor to the pad. The data leakage component is configured to mitigate leakage current from the pad to the second transistor.