A high sensitivity image sensor comprises an epitaxial layer of silicon that is intrinsic or lightly p doped (such as a doping level less than about 1013 cm−3). CMOS or CCD circuits are fabricated on the front-side of the epitaxial layer. Epitaxial p and n type layers are grown on the backside of the epitaxial layer. A pure boron layer is deposited on the n-type epitaxial layer. Some boron is driven a few nm into the n-type epitaxial layer from the backside during the boron deposition process. An anti-reflection coating may be applied to the pure boron layer. During operation of the sensor a negative bias voltage of several tens to a few hundred volts is applied to the boron layer to accelerate photo-electrons away from the backside surface and create additional electrons by an avalanche effect. Grounded p-wells protect active circuits as needed from the reversed biased epitaxial layer.