Invention Grant
US09411390B2 Integrated circuit device having power domains and partitions based on use case power optimization
有权
具有功率域和基于用例功率优化的分区的集成电路器件
- Patent Title: Integrated circuit device having power domains and partitions based on use case power optimization
- Patent Title (中): 具有功率域和基于用例功率优化的分区的集成电路器件
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Application No.: US12029404Application Date: 2008-02-11
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Publication No.: US09411390B2Publication Date: 2016-08-09
- Inventor: Brian Smith , Parthasarathy Sriram , Stephane Le Provost
- Applicant: Brian Smith , Parthasarathy Sriram , Stephane Le Provost
- Applicant Address: US CA Santa Clara
- Assignee: NVIDIA CORPORATION
- Current Assignee: NVIDIA CORPORATION
- Current Assignee Address: US CA Santa Clara
- Main IPC: G06F1/32
- IPC: G06F1/32

Abstract:
A programmable SoC (system on a chip) having optimized power domains and power islands. The SoC is an integrated circuit device including a plurality of power domains, each of the power domains having a respective voltage rail to supply power to the power domain. A plurality of power islands are included within the integrated circuit device, wherein each power domain includes at least one power island. A plurality of functional blocks are included within the integrated circuit device, wherein each power island includes at least one functional block. Each functional block is configured to provide a specific device functionality. The integrated circuit device adjusts power consumption in relation to a requested device functionality by individually turning on or turning off power to a selected one or more power domains, and for each turned on power domain, individually power gating one or more power islands.
Public/Granted literature
- US20090201082A1 INTEGRATED CIRCUIT DEVICE HAVING POWER DOMAINS AND PARTITIONS BASED ON USE CASE POWER OPTIMIZATION Public/Granted day:2009-08-13
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