Invention Grant
US09411668B2 Approach to predictive verification of write integrity in a memory driver
有权
对存储器驱动程序中写入完整性进行预测验证的方法
- Patent Title: Approach to predictive verification of write integrity in a memory driver
- Patent Title (中): 对存储器驱动程序中写入完整性进行预测验证的方法
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Application No.: US14154655Application Date: 2014-01-14
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Publication No.: US09411668B2Publication Date: 2016-08-09
- Inventor: Arijit Banerjee , Mahmut Ersin Sinangil , John W. Poulton
- Applicant: NVIDIA CORPORATION
- Applicant Address: US CA Santa Clara
- Assignee: NVIDIA Corporation
- Current Assignee: NVIDIA Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Artegis Law Group, LLP
- Main IPC: G06F11/07
- IPC: G06F11/07

Abstract:
A subsystem is configured to apply an offset voltage to a test, or canary, SRAM write driver circuit to create a condition that induces failure of the write operation. The offset voltage is incrementally increased until failure of the test write operation occurs in the canary SRAM circuit. The subsystem then calculates a probability of failure for the actual, non-test SRAM write operation, which is performed by an equivalent driver circuit with zero offset. The subsystem then compares the result to a benchmark acceptable probability figure. If the calculated probability of failure is greater than the benchmark acceptable probability figure, corrective action is initiated. In this manner, actual failures of SRAM write operations are anticipated, and corrective action reduces their occurrence and their impact on system performance.
Public/Granted literature
- US20150199223A1 APPROACH TO PREDICTIVE VERIFICATION OF WRITE INTEGRITY IN A MEMORY DRIVER Public/Granted day:2015-07-16
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