Invention Grant
US09412589B2 Method for fabricating NMOS and PMOS transistors on a substrate of the SOI, in particular FDSOI, type and corresponding integrated circuit
有权
在SOI的衬底上制造NMOS和PMOS晶体管的方法，特别是FDSOI，类型和相应的集成电路
- Patent Title: Method for fabricating NMOS and PMOS transistors on a substrate of the SOI, in particular FDSOI, type and corresponding integrated circuit
- Patent Title (中): 在SOI的衬底上制造NMOS和PMOS晶体管的方法，特别是FDSOI，类型和相应的集成电路
-
Application No.: US14501639Application Date: 2014-09-30
-
Publication No.: US09412589B2Publication Date: 2016-08-09
- Inventor: David Barge , Philippe Garnier , Yves Campidelli
- Applicant: STMICROELECTRONICS (CROLLES 2) SAS
- Applicant Address: FR Crolles
- Assignee: STMICROELECTRONICS (CROLLES 2) SAS
- Current Assignee: STMICROELECTRONICS (CROLLES 2) SAS
- Current Assignee Address: FR Crolles
- Agency: Allen, Dyer, Doppelt, Milbrath & Gilchrist, P.A.
- Priority: FR1360303 20131023
- Main IPC: H01L21/8238
- IPC: H01L21/8238 ; H01L27/092 ; H01L21/02 ; H01L27/12 ; H01L21/84 ; H01L29/417 ; H01L29/423 ; H01L29/66 ; H01L29/786
Abstract:
An integrated circuit includes an NMOS transistor and a PMOS transistor on different regions of an SOI substrate. Each transistor includes a gate region, multilayer lateral insulating regions against the sides of the gate region while also on the substrate. Each multilayer lateral insulating region includes an inclined portion sloping away from the substrate. Source and drain regions are on the substrate and are separated from the sides of the gate region by the corresponding multilayer lateral insulating region. The source and drain regions have an inclined portion resting against the inclined portion of the the lateral insulating region.
Public/Granted literature
Information query
IPC分类:
