Invention Grant
- Patent Title: Method for forming package-on-package structure
- Patent Title (中): 用于形成封装在封装结构上的方法
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Application No.: US13683502Application Date: 2012-11-21
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Publication No.: US09412661B2Publication Date: 2016-08-09
- Inventor: Chun-Lin Lu , Ming-Kai Liu , Kai-Chiang Wu , Ching-Feng Yang
- Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Slater Matsil, LLP
- Main IPC: H01L23/48
- IPC: H01L23/48 ; H01L21/768 ; H01L21/56 ; H01L23/00 ; H01L25/03 ; H01L25/00 ; H01L23/538 ; H01L21/683 ; H01L23/31 ; H01L23/498
Abstract:
A method comprises attaching a semiconductor die on a first side of a wafer, attaching a first top package on the first side of the wafer and attaching a second top package on the first side of the wafer. The method further comprises depositing an encapsulation layer over the first side of the wafer, wherein the first top package and the second top package are embedded in the encapsulation layer, applying a thinning process to a second side of the wafer, sawing the wafer into a plurality of chip packages and attaching the chip package to a substrate.
Public/Granted literature
- US20140138816A1 Method for Forming Package-on-Package Structure Public/Granted day:2014-05-22
Information query
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