Invention Grant
- Patent Title: Shielded wire arrangement for die testing
- Patent Title (中): 用于模具测试的屏蔽线布置
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Application No.: US14062805Application Date: 2013-10-24
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Publication No.: US09412674B1Publication Date: 2016-08-09
- Inventor: Myongseob Kim , Henley Liu , Cheang-Whang Chang , Sanjiv Stokes
- Applicant: Xilinx, Inc.
- Applicant Address: US CA San Jose
- Assignee: XILINX, INC.
- Current Assignee: XILINX, INC.
- Current Assignee Address: US CA San Jose
- Agent Kevin T. Cuenot
- Main IPC: H01L23/58
- IPC: H01L23/58 ; H01L29/10 ; H01L21/66 ; G01R31/26

Abstract:
An integrated circuit includes a die having a conductive layer. The conductive layer includes a data wire, a first power supply wire of a first voltage potential, and a second power supply wire of a second voltage potential different from the first voltage potential. A segment of the data wire is located between, and substantially parallel to, a segment of the first power supply wire and a segment of the second power supply wire. Further, the first power supply wire is coupled to a first probe structure; and, the second power supply wire is coupled to a second probe structure.
Information query
IPC分类: