Invention Grant
US09412827B2 Vertical semiconductor device having semiconductor mesas with side walls and a PN-junction extending between the side walls
有权
具有具有侧壁的半导体台面和在侧壁之间延伸的PN结的垂直半导体器件
- Patent Title: Vertical semiconductor device having semiconductor mesas with side walls and a PN-junction extending between the side walls
- Patent Title (中): 具有具有侧壁的半导体台面和在侧壁之间延伸的PN结的垂直半导体器件
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Application No.: US14879851Application Date: 2015-10-09
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Publication No.: US09412827B2Publication Date: 2016-08-09
- Inventor: Peter Brandl , Matthias Herman Peri
- Applicant: Infineon Technologies AG
- Applicant Address: DE Neubiberg
- Assignee: Infineon Technologies AG
- Current Assignee: Infineon Technologies AG
- Current Assignee Address: DE Neubiberg
- Agency: Murphy, Bilak & Homiller, PLLC
- Main IPC: H01L29/66
- IPC: H01L29/66 ; H01L29/423 ; H01L21/265 ; H01L21/306 ; H01L21/308 ; H01L21/31 ; H01L21/324 ; H01L27/088 ; H01L29/739 ; H01L29/78 ; H01L29/40

Abstract:
A vertical semiconductor device includes a semiconductor body having a backside and extending, in a peripheral area and in a vertical direction substantially perpendicular to the backside, from the backside to a first surface of the semiconductor body, the body including in an active area spaced apart semiconductor mesas extending, in the vertical direction, from the first surface to a main surface arranged above the first surface, in a vertical cross-section the peripheral area extending between the active area and an edge that extends between the back-side and the first surface, in the vertical cross-section each of the mesas including first and second side walls, a first pn-junction extending between the first and second side walls, and a conductive region in Ohmic contact with the mesa and extending from the main surface into the mesa. Gate electrodes are arranged between adjacent mesas and extend across the first pn-junctions.
Public/Granted literature
Information query
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