- Patent Title: Semiconductor device and semiconductor device manufacturing method
-
Application No.: US14677359Application Date: 2015-04-02
-
Publication No.: US09412832B2Publication Date: 2016-08-09
- Inventor: Mitsuaki Kirisawa
- Applicant: FUJI ELECTRIC CO., LTD.
- Applicant Address: JP Kawasaki-shi
- Assignee: FUJI ELECTRIC CO., LTD.
- Current Assignee: FUJI ELECTRIC CO., LTD.
- Current Assignee Address: JP Kawasaki-shi
- Agency: Rossi, Kimms & Mcdowell LLP
- Priority: JP2011-195969 20110908
- Main IPC: H01L29/167
- IPC: H01L29/167 ; H01L29/868 ; H01L29/66 ; H01L29/861 ; H01L21/324 ; H01L21/265 ; H01L29/78 ; H01L29/06 ; H01L21/285 ; H01L21/304 ; H01L29/08 ; H01L29/10 ; H01L29/36 ; H01L29/45

Abstract:
In aspects of the invention, an n-type epitaxial layer that forms an n− type drift layer is formed on the upper surface of an n-type semiconductor substrate formed by being doped with a high concentration of antimony. A p-type anode layer is formed on a surface of the n− type drift layer. An n-type contact layer is formed with an impurity concentration in the same region as the impurity concentration of the n-type cathode layer, or higher than the impurity concentration of the n-type cathode layer, on the lower surface of the n-type cathode layer. A cathode electrode is formed so as to be in contact with the n-type contact layer. The n-type contact layer is doped with phosphorus and, without allowing complete recrystallization using a low temperature heat treatment of 500° C. or less, lattice defects are allowed to remain.
Public/Granted literature
- US20150228752A1 SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE MANUFACTURING METHOD Public/Granted day:2015-08-13
Information query
IPC分类: