A method for fabricating a field-effect transistor includes forming a spacer adjacent to sidewalls of a gate structure. The method further includes forming silicide regions in a substrate adjacent to the spacer. The method further includes depositing a first interlayer dielectric layer over the substrate. The method further includes exposing a top surface of the gate structure. The method further includes depositing a contact etch stop layer over the first interlayer dielectric layer and the top surface of the gate structure. The method further includes patterning the contact etch stop layer to remove a portion of the contact etch stop layer over the silicide regions, wherein the contact etch stop layer over the gate structure is maintained.