Invention Grant
US09413343B2 Method for reducing noise using layout scheme and comparing device 有权
使用布局方案和比较装置降低噪音的方法

  • Patent Title: Method for reducing noise using layout scheme and comparing device
  • Patent Title (中): 使用布局方案和比较装置降低噪音的方法
  • Application No.: US14476407
    Application Date: 2014-09-03
  • Publication No.: US09413343B2
    Publication Date: 2016-08-09
  • Inventor: Si-Wook Yoo
  • Applicant: SK hynix Inc.
  • Applicant Address: KR Gyeonggi-do
  • Assignee: SK Hynix Inc.
  • Current Assignee: SK Hynix Inc.
  • Current Assignee Address: KR Gyeonggi-do
  • Agency: IP & T Group LLP
  • Priority: KR10-2014-0033465 20140321
  • Main IPC: H03K5/1252
  • IPC: H03K5/1252 H03K5/24
Method for reducing noise using layout scheme and comparing device
Abstract:
A comparing device includes a first stage comparator and a second stage comparator serially coupled to the first stage comparator, wherein output lines of the second stage comparator are disposed to be overlapped with respective input lines of the second stage comparator.
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