Invention Grant
US09413696B2 System architecture and method for communication between devices over backplane to reduce interface count 有权
用于通过背板的设备之间的通信的系统架构和方法,以减少接口数量

  • Patent Title: System architecture and method for communication between devices over backplane to reduce interface count
  • Patent Title (中): 用于通过背板的设备之间的通信的系统架构和方法,以减少接口数量
  • Application No.: US14008554
    Application Date: 2011-07-08
  • Publication No.: US09413696B2
    Publication Date: 2016-08-09
  • Inventor: Srinivas RaoGajendra Singh Ranka
  • Applicant: Srinivas RaoGajendra Singh Ranka
  • Applicant Address: IN Bangalore
  • Assignee: Tejas Networks Ltd
  • Current Assignee: Tejas Networks Ltd
  • Current Assignee Address: IN Bangalore
  • Agent Deborah A. Gador
  • Priority: IN1027/CHE/2011 20110330
  • International Application: PCT/IB2011/053039 WO 20110708
  • International Announcement: WO2012/131447 WO 20121004
  • Main IPC: H04L12/931
  • IPC: H04L12/931 G06F13/40 G06F13/36
System architecture and method for communication between devices over backplane to reduce interface count
Abstract:
The present disclosure discloses a system architecture and method for reducing pin count on a backplane connecting plurality of devices. In an embodiment, the signals from the plurality of devices are multiplexed or mapped into time slots using a MapMux device. The MapMux device then sends the multiplexed or mapped signals over backplane on TDM bus. The MapMux device at the receiving end de-multiplexes or de-maps and sends the received signals to plurality of devices for further processing. The present disclosure allows a large number of signals to be passed between the devices through a single stream.
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