Invention Grant
US09431297B2 Method of forming an interconnect structure for a semiconductor device
有权
形成用于半导体器件的互连结构的方法
- Patent Title: Method of forming an interconnect structure for a semiconductor device
- Patent Title (中): 形成用于半导体器件的互连结构的方法
-
Application No.: US14504067Application Date: 2014-10-01
-
Publication No.: US09431297B2Publication Date: 2016-08-30
- Inventor: Yung-Hsu Wu , Cheng-Hsiung Tsai , Yu-Sheng Chang , Chia-Tien Wu , Chung-Ju Lee , Yung-Sung Yen , Chun-Kuang Chen , Tien-I Bao , Ru-Gun Liu , Shau-Lin Shue
- Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Haynes and Boone, LLP
- Main IPC: H01L21/4763
- IPC: H01L21/4763 ; H01L21/768 ; H01L21/02 ; H01L21/311
Abstract:
Methods of semiconductor device fabrication are provided including those that provide a substrate having a plurality of trenches disposed in a dielectric layer formed above the substrate. A via pattern including a plurality of openings may be defined above the substrate. A spacer material layer is formed on a sidewall at least one trench. Via holes can be etched in the dielectric layer using the via pattern and spacer material layer as a masking element.
Public/Granted literature
- US20160099174A1 METHOD OF FORMING AN INTERCONNECT STRUCTURE FOR A SEMICONDUCTOR DEVICE Public/Granted day:2016-04-07
Information query
IPC分类:
