Invention Grant
US09431398B2 Semiconductor chip having a circuit with cross-coupled transistors to thwart reverse engineering
有权
半导体芯片具有交叉耦合晶体管的电路以阻止逆向工程
- Patent Title: Semiconductor chip having a circuit with cross-coupled transistors to thwart reverse engineering
- Patent Title (中): 半导体芯片具有交叉耦合晶体管的电路以阻止逆向工程
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Application No.: US14262830Application Date: 2014-04-28
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Publication No.: US09431398B2Publication Date: 2016-08-30
- Inventor: Thomas Kuenemund
- Applicant: Infineon Technologies AG
- Applicant Address: DE Neubiberg
- Assignee: INFINEON TECHNOLOGIES AG
- Current Assignee: INFINEON TECHNOLOGIES AG
- Current Assignee Address: DE Neubiberg
- Main IPC: H01L23/528
- IPC: H01L23/528 ; H01L27/092 ; H01L23/00
Abstract:
According to one embodiment, a chip has a circuit with at least one p channel field effect transistor (FET); at least one n channel FET; a first and a second power supply terminal; wherein the n channel FET, if supplied with the upper supply potential at its gate, supplies the lower supply potential to the gate of the p channel FET; and the p channel FET, if supplied with the lower supply potential at its gate, supplies the upper supply potential to the gate of the n channel FET; wherein the logic state of the gate of the p channel FET and of the n channel FET can only be changed by at least one of the first and second supply voltage to the circuit; and a connection coupled to the gate of the p channel FET or the n channel FET and a further component of the semiconductor chip.
Public/Granted literature
- US20150311202A1 SEMICONDUCTOR CHIP Public/Granted day:2015-10-29
Information query
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