Invention Grant
- Patent Title: Digital-to-analog converter using nonlinear capacitance compensation
- Patent Title (中): 数模转换器采用非线性电容补偿
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Application No.: US14706543Application Date: 2015-05-07
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Publication No.: US09432038B1Publication Date: 2016-08-30
- Inventor: Christopher Ward , Klaas Bult , Iniyavan Elumalai
- Applicant: Broadcom Corporation
- Applicant Address: US CA Irvine
- Assignee: Broadcom Corporation
- Current Assignee: Broadcom Corporation
- Current Assignee Address: US CA Irvine
- Agency: Sterne, Kessler, Goldstein & Fox P.L.L.C.
- Main IPC: H03M1/06
- IPC: H03M1/06 ; H03M1/66 ; H03K17/16

Abstract:
A semiconductor device fabrication operation is commonly used to manufacture one or more integrated circuits onto a semiconductor substrate. The semiconductor device fabrication operation forms one or more transistors onto an arrangement of fabrication layers to form the one or more integrated circuits which introduces unwanted capacitances, often referred to as parasitic capacitances, into the one or more transistors. The one or more integrated circuits include one or more compensation modules that, when combined with the parasitic capacitances of the one or more transistors, ideally linearizes the non-linearity caused by the parasitic capacitances of the one or more transistors. For example, the one or more compensation modules incorporate a non-linear or a piecewise linear transfer function that is inversely related to the parasitic capacitances of the one or more transistors.
Public/Granted literature
- US20160254820A1 Digital-To-Analog Converter Using Nonlinear Capacitance Compensation Public/Granted day:2016-09-01
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