Invention Grant
US09436611B2 Processor, cache memory of the processor and control method of the processor
有权
处理器，处理器的高速缓存和处理器的控制方法
- Patent Title: Processor, cache memory of the processor and control method of the processor
- Patent Title (中): 处理器，处理器的高速缓存和处理器的控制方法
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Application No.: US14256565Application Date: 2014-04-18
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Publication No.: US09436611B2Publication Date: 2016-09-06
- Inventor: Ing-Jer Huang , Chun-Hung Lai
- Applicant: NATIONAL SUN YAT-SEN UNIVERSITY
- Applicant Address: TW Kaohsiung
- Assignee: NATIONAL SUN YAT-SEN UNIVERSITY
- Current Assignee: NATIONAL SUN YAT-SEN UNIVERSITY
- Current Assignee Address: TW Kaohsiung
- Agency: Muncy, Geissler, Olds & Lowe, P.C.
- Priority: TW102137922A 20131021
- Main IPC: G06F12/00
- IPC: G06F12/00 ; G06F11/34 ; G06F11/36 ; G06F12/08
Abstract:
A processor capable of storing trace data is disclosed. The processor includes a core adapted to execute programs, as well as a cache memory electrically connected to the core. The cache memory includes a core way and a trace way. The core way is adapted to store data that is required when the core executes the programs. The trace way is adapted to store data that is generated during debugging operations of the core. A control method of the processor is also disclosed.
Public/Granted literature
- US20150113228A1 PROCESSOR, CACHE MEMORY OF THE PROCESSOR AND CONTROL METHOD OF THE PROCESSOR Public/Granted day:2015-04-23
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