Invention Grant
- Patent Title: Time slice processing of tessellation and geometry shaders
- Patent Title (中): 镶嵌和几何着色器的时间片处理
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Application No.: US13208256Application Date: 2011-08-11
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Publication No.: US09436969B2Publication Date: 2016-09-06
- Inventor: Ziyad S. Hakura , Emmett M. Kilgariff , Dale L. Kirkland , Johnny S. Rhoades , Cynthia Ann Edgeworth Allison , Karim M. Abdalla
- Applicant: Ziyad S. Hakura , Emmett M. Kilgariff , Dale L. Kirkland , Johnny S. Rhoades , Cynthia Ann Edgeworth Allison , Karim M. Abdalla
- Applicant Address: US CA Santa Clara
- Assignee: NVIDIA Corporation
- Current Assignee: NVIDIA Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Artegis Law Group, LLP
- Main IPC: G06T1/20
- IPC: G06T1/20

Abstract:
One embodiment of the present invention sets forth a technique for redistributing geometric primitives generated by tessellation and geometry shaders for processing by multiple graphics pipelines. Geometric primitives that are generated in a first processing cycle are collected and redistributed more evenly and in smaller tasks to the multiple graphics pipelines for vertex processing in a second processing cycle. The smaller tasks do not exceed the resource limits of a graphics pipeline and the per-vertex processing workloads of the graphics pipelines in the second cycle are balanced and make full use of resources. Therefore, the performance of the tessellation and geometry shaders is improved.
Public/Granted literature
- US20130038620A1 TIME SLICE PROCESSING OF TESSELLATION AND GEOMETRY SHADERS Public/Granted day:2013-02-14
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