Invention Grant
US09437476B2 Method of manufacturing semiconductor device including air gap between patterns
有权
制造半导体器件的方法，包括图案之间的气隙
- Patent Title: Method of manufacturing semiconductor device including air gap between patterns
- Patent Title (中): 制造半导体器件的方法，包括图案之间的气隙
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Application No.: US14325789Application Date: 2014-07-08
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Publication No.: US09437476B2Publication Date: 2016-09-06
- Inventor: Keisuke Nakazawa , Ichiro Mizushima , Shinichi Nakao
- Applicant: KABUSHIKI KAISHA TOSHIBA
- Applicant Address: JP Tokyo
- Assignee: Kabushiki Kaisha Toshiba
- Current Assignee: Kabushiki Kaisha Toshiba
- Current Assignee Address: JP Tokyo
- Agency: Finnegan, Henderson, Farabow, Garrett & Dunner LLP
- Priority: JP2014-49423 20140312
- Main IPC: H01L21/3205
- IPC: H01L21/3205 ; H01L21/764 ; H01L21/28 ; H01L27/115
Abstract:
In one embodiment, a method of manufacturing a semiconductor device includes forming a pattern portion and a flat portion on a substrate, the pattern portion including plural patterns, and the flat portion having a flat surface at a position lower than upper surfaces of the patterns. The method further includes transferring a first film on the substrate to continuously form the first film on the upper surfaces of the patterns and on the flat surface of the flat portion and to form a first air gap between the patterns.
Public/Granted literature
- US20150263114A1 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SAME Public/Granted day:2015-09-17
Information query
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