Invention Grant
- Patent Title: Method of manufacturing a wiring substrate
- Patent Title (中): 制造布线基板的方法
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Application No.: US14095182Application Date: 2013-12-03
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Publication No.: US09437489B2Publication Date: 2016-09-06
- Inventor: Tsuyoshi Yoda
- Applicant: Seiko Epson Corporation
- Applicant Address: JP
- Assignee: Seiko Epson Corporation
- Current Assignee: Seiko Epson Corporation
- Current Assignee Address: JP
- Agency: Harness, Dickey & Pierce, P.L.C.
- Priority: JP2010-107007 20100507
- Main IPC: H01L21/768
- IPC: H01L21/768 ; H05K3/40 ; H05K3/22 ; H05K3/32 ; H05K3/42 ; H05K3/46 ; B81B7/00 ; G01C19/56 ; G01C19/5776 ; H01L23/48

Abstract:
A method of manufacturing a wiring substrate including a step of forming a through hole that includes forming a first concave portion in a substrate that extends from a second surface to a first insulating layer without passing through the first insulating layer; forming a second insulating layer at least within the first concave portion; and forming a second concave portion through the second insulating layer and the first insulating layer to expose a surface of a pad electrode, wherein the second concave portion is formed within the first concave portion; and filling the first concave portion and the second concave portion with a conductive body or forming the conductive body to coat inner walls of the first concave portion and the second concave portion, and forming the through electrode such that it is connected to the pad electrode.
Public/Granted literature
- US20140082936A1 METHOD OF MANUFACTURING A WIRING SUBSTRATE Public/Granted day:2014-03-27
Information query
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