Invention Grant
- Patent Title: Dual-side exposed semiconductor package with ultra-thin die and manufacturing method thereof
- Patent Title (中): 具有超薄模的双面裸露半导体封装及其制造方法
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Application No.: US14862136Application Date: 2015-09-22
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Publication No.: US09437528B1Publication Date: 2016-09-06
- Inventor: Yuping Gong , Xiaoming Sui , Yan Yun Xue , Jun Lu
- Applicant: Alpha and Omega Semiconductor (Cayman) Ltd.
- Applicant Address: US CA Sunnyvale
- Assignee: ALPHA AND OMEGA SEMICONDUCTOR (CAYMAN) LTD.
- Current Assignee: ALPHA AND OMEGA SEMICONDUCTOR (CAYMAN) LTD.
- Current Assignee Address: US CA Sunnyvale
- Agent Chen-Chi Lin
- Main IPC: H01L23/495
- IPC: H01L23/495 ; H01L21/78 ; H01L21/56 ; H01L23/31

Abstract:
A dual-side exposed semiconductor package with ultra-thin die and a manufacturing method are disclosed. A die having a source electrode and a gate electrode at top surface is flipped and attached to a die paddle of a lead frame and then is encapsulated with a first molding compound. The first molding compound and the die are ground to reduce the thickness. A mask is applied atop the lead frame with the back of the flipped die exposed and a metal layer is deposited on the exposed area at the back of the flipped die. A metal clip is attached to the back of the flipped die. A second molding compound is deposited on the lead frame with the top surface of the metal clip exposed from the top surface of the second molding compound and the bottom surface of the lead frame exposed from the bottom surface of the second plastic molding compound.
Information query
IPC分类: