Invention Grant
- Patent Title: Multiple die face-down stacking for two or more die
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Application No.: US14689346Application Date: 2015-04-17
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Publication No.: US09437579B2Publication Date: 2016-09-06
- Inventor: Belgacem Haba , Wael Zohni , Richard Dewitt Crisp , Ilyas Mohammed , Frank Lambrecht
- Applicant: Tessera, Inc.
- Applicant Address: US CA San Jose
- Assignee: Tessera, Inc.
- Current Assignee: Tessera, Inc.
- Current Assignee Address: US CA San Jose
- Agency: Lerner, David, Littenberg, Krumholz & Mentlik, LLP
- Main IPC: H01L21/58
- IPC: H01L21/58 ; H01L21/60 ; H01L25/065 ; H01L23/492 ; H01L23/13 ; H01L23/31 ; H01L23/00 ; H01L23/498
Abstract:
A microelectronic assembly can include a substrate having first and second surfaces each extending in first and second transverse directions, a peripheral edge extending in the second direction, first and second openings extending between the first and second surfaces, and a peripheral region of the second surface extending between the peripheral edge and one of the openings. The assembly can also include a first microelectronic element having a front surface facing the first surface, a rear surface opposite therefrom, and an edge extending between the front and rear surfaces. The assembly can also include a second microelectronic element having a front surface facing the rear surface of the first microelectronic element and projecting beyond the edge of the first microelectronic element. The assembly can also include a plurality of terminals exposed at the second surface, at least one of the terminals being disposed at least partially within the peripheral region.
Public/Granted literature
- US20150221617A1 MULTIPLE DIE FACE-DOWN STACKING FOR TWO OR MORE DIE Public/Granted day:2015-08-06
Information query
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